(r13) IfpacDocumentation < Palomar/ZTF

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---+ IFPAC System Documentation
<br>
Legend: <br>
%RED% *Red* %ENDCOLOR% - Document empty <br>
<font color="#ffcc00"> *Yellow* </font> - Document in progress <br>
%GREEN% *Green* %ENDCOLOR% - Document completed <br>

[[%ATTACHURL%/ZTFDesignDocumentTemplate.docx][ZTFDesignDocumentTemplate]] - Use this template for design documents

---+++++ Hardware
   * *Single Board Controller*
      * *Single Board Controller Overview*
         * Single Board Controller Layout Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
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            * Single Board Controller Layout Document - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
               * %RED%Functional block placement (clock functions, bias functions, and signal chain) %ENDCOLOR%
               * %RED% Ground plane layout and analysis %ENDCOLOR%
               * %RED% Configuration Control %ENDCOLOR%
               * %RED% Power consumption %ENDCOLOR%
               * %RED% Board temperature gradients and thermal analysis %ENDCOLOR%
      * *Clock Driver*
         * Clock Driver Schematic Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * All clock channels - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
         * Clock Driver Design Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * Clock Design and Noise Analysis - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
               * %RED% Clock voltage range %ENDCOLOR%
               * %RED% Clock voltage resolution %ENDCOLOR%
               * %RED% Clock voltage noise analysis %ENDCOLOR%
               * %RED% Clock voltage amplifier design %ENDCOLOR%
               * %RED% Clock driving current and load analysis %ENDCOLOR%
               * %RED% Clock switching speed %ENDCOLOR%
               * %RED% Required voltages %ENDCOLOR%
               * %RED% Power supply noise requirements (PSRR Analysis) %ENDCOLOR%
               * %RED% Power consumption %ENDCOLOR%
               * %RED% Heat dissipation/Thermal analysis %ENDCOLOR%
      * *Bias Voltages*
         * Bias Voltage Schematic Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * All bias channels - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
         * Bias Voltage Design Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * Bias Design and Noise Analysis - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
               * %RED% Bias voltage range %ENDCOLOR%
               * %RED% Bias voltage resolution %ENDCOLOR%
               * %RED% Bias voltage noise analysis %ENDCOLOR%
               * %RED% Bias voltage amplifier design %ENDCOLOR%
               * %RED% Bias voltage driving current and load analysis %ENDCOLOR%
               * %RED% Required voltages %ENDCOLOR%
               * %RED% Power supply noise requirements (PSRR Analysis) %ENDCOLOR%
               * %RED% Power consumption %ENDCOLOR%
               * %RED% Heat dissipation/Thermal analysis %ENDCOLOR%
      * *Video Chain*
         * Video Chain Schematic Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * Preamplifier Schematic - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
            * [[%ATTACHURL%/ADCBufferSchematic.pdf][ADCBufferSchematic]] - <font style="BACKGROUND-COLOR: yellow">Last updated 1/10/2014 </font>
         * Video Chain Design Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * [[%ATTACHURL%/PreamplifierDesignDocument.doc][Preamplifier Design and Noise Analysis Document]] - <font style="BACKGROUND-COLOR: yellow"> Last updated 1/10/2014 </font>
               * %RED% Grounding Scheme %ENDCOLOR%
               * %RED% Power supply noise analysis (PSRR Analysis and ADC bias analysis) %ENDCOLOR%
               * %RED% Required voltages %ENDCOLOR%
               * %RED% Power consumption %ENDCOLOR%
               * %RED% Heat dissipation/thermal analysis %ENDCOLOR%
            * [[%ATTACHURL%/VideoPostProcessorDesignDocument.docx][ADC Buffer Amplifier Design and Noise Analysis]] - <font style="BACKGROUND-COLOR: yellow"> Last updated 1/10/2014 </font>
               * [[%ATTACHURL%/Anti-AliasingFilterDesign.docx][Anti-Aliasing Filter Design]] - <font style="BACKGROUND-COLOR: yellow"> Last updated 1/10/2014 </font>
               * %RED% ADC communications/digital interface %ENDCOLOR%
               * %RED% Video chain voltage offset noise analysis %ENDCOLOR%
               * %RED% ADC biasing scheme %ENDCOLOR%
               * %RED% Grounding Scheme %ENDCOLOR%
               * %RED% Power supply noise analysis (PSRR Analysis and ADC bias analysis) %ENDCOLOR%
               * %RED% Required voltages %ENDCOLOR%
               * %RED% Power consumption %ENDCOLOR%
               * %RED% Heat dissipation/thermal analysis %ENDCOLOR%
      * *On-Board Digital Logic*
         * FPGA Design Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * FPGA Design Document - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
               * %RED% FPGA block diagram %ENDCOLOR%
               * %RED% FPGA schematic and pinout %ENDCOLOR%
               * %RED% FPGA core firmware %ENDCOLOR%
               * %RED% Multi-board FPGA synchronization %ENDCOLOR%
               * %RED% Programmability/diagnostic outputs %ENDCOLOR%
               * %RED% USB communication interface %ENDCOLOR%
               * %RED% Clock driver interface %ENDCOLOR%
               * %RED% Waveform generator %ENDCOLOR%
               * %RED% DAC interface %ENDCOLOR%
               * %RED% ADC interface %ENDCOLOR%
               * %RED% Data processing %ENDCOLOR%
               * %RED% Required voltages %ENDCOLOR%
               * %RED% Power consumption %ENDCOLOR%
               * %RED% Heat dissipation/thermal analysis %ENDCOLOR%
         * Communication Design Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * Communication Design Document - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
               * %RED% Communication block diagram %ENDCOLOR%
               * %RED% Communication schematic %ENDCOLOR%
               * %RED% USB Communication chipset %ENDCOLOR%
               * %RED% FPGA/USB interface %ENDCOLOR%
               * %RED% Communication Traffic Control %ENDCOLOR%
               * %RED% Fiber optic chipset %ENDCOLOR%
               * %RED% USB configuration %ENDCOLOR%
               * %RED% Required voltages %ENDCOLOR%
               * %RED% Power consumption %ENDCOLOR%
               * %RED% Heat dissipation/thermal analysis %ENDCOLOR%
      * *Chassis*
         * Power Supply Board vs. Chassis Power Supply Trade Study %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * %RED% Trade off study of power supply board versus power for chassis %ENDCOLOR%
            * %RED% Voltage/Current Requirements %ENDCOLOR%
            * %RED% Voltage Noise Requirements %ENDCOLOR%
            * %RED% Power Dissipation %ENDCOLOR%
            * %RED% Thermal Analysis/Thermal Management/Active Cooling %ENDCOLOR%
            * %RED% Connector Pinouts %ENDCOLOR%
         * Backplane Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * %RED% Full backplane schematic %ENDCOLOR%
            * %RED% Connector Pinouts %ENDCOLOR%
            * %RED% Mounting Hardware %ENDCOLOR%
            * %RED% Test Points %ENDCOLOR%
         * Mechanical Documents %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
            * %RED% Solidworks drawing of Chassis %ENDCOLOR%
            * %RED% Mounting points for Chassis %ENDCOLOR%
            * %RED% Cooling/Temperature Monitoring of Chassis %ENDCOLOR%
            * %RED% State of Health Monitoring of Chassis %ENDCOLOR%

---+++++ Firmware
   * *Communication Firmware Documents* %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
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      * Firmware for USB chipset - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
         * %RED% USB Protocol %ENDCOLOR%
         * %RED% Bit rate control %ENDCOLOR%
         * %RED% Communication protocol %ENDCOLOR%
         * %RED% Control/Handshaking protocol and signals %ENDCOLOR%
   * *FPGA Code* %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
      * FPGA Core Firmware Document - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
         * %RED% Compiling FPGA Firmware %ENDCOLOR%
         * %RED% JTAG interface for FPGA %ENDCOLOR%
         * %RED% EEPROM %ENDCOLOR%
         * %RED% Firmware code verification %ENDCOLOR%
         * %RED% Firmware Updating/Maintenance %ENDCOLOR%

---+++++ Host Software
   * *Review Documents* %TWISTY{mode="div" showlink="" hidelink=""
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      * Software Requirements Document - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
         * %RED% Descriptions of system requirements %ENDCOLOR%
         * %RED% Descriptions of functional requirements %ENDCOLOR%
      * Software Architecture Document - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
         * %RED% Description of the overall layout of the software %ENDCOLOR%
         * %RED% Instrument context diagram %ENDCOLOR%
         * %RED% List and descriptions of software units %ENDCOLOR%
         * %RED% List and descriptions of interfaces between units %ENDCOLOR%
         * %RED% List and descriptions of interfaces between software and hardware %ENDCOLOR%
      * Preliminary Design Review Document - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Detailed Design Review Document - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Instrument Users Manual - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
         * %RED% Startup procedure description %ENDCOLOR%
         * %RED% Shutdown procedure description %ENDCOLOR%
         * %RED% List of operations and how they are used %ENDCOLOR%
      * System Command Summary - <font style="BACKGROUND-COLOR: red"> Empty Document </font> 
   * *Software Module Descriptions* %TWISTY{mode="div" showlink="" hidelink=""
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      * CCD Control Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Environmental Monitoring Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Power Control Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Filter Control Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Shutter Control Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Focus Control Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Supervisory Control Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Temperature Control Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Data Logging Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Vacuum Monitoring Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
   * *Software Inter-Process Communications (IPC) Documents* %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
      * CCD Server Main to Client Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * CCD Server Main to CCD Controller API Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * CCD Server Main to CCD Readout Thread Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * CCD Server Main to FITS Header Thread Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * CCD Readout Thread to CCD Controller API Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * CCD Controller API to CCD USB Driver Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
   * *Interfaces to Control Hardware Documents* %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
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      * Filter Control Software to Filter Controller Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Focus Control Software to Focus Controller Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Power Control Software to Power Controller Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Shutter Control Software to Shutter Controller Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Temperature Control Software to Termperature Controller Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Vacuum Monitoring Software to Vacuum Gauge Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
   * *FITS File Documents* %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
      * FITS File Document - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
         * %RED% List of header keywords %ENDCOLOR%
         * %RED% Sources for keyword values %ENDCOLOR%
         * %RED% How keywords are collected from sources %ENDCOLOR%
         * %RED% When keywords are collected from sources %ENDCOLOR%
         * %RED% When is the header written %ENDCOLOR%
         * %RED% When and how are the pixel data written %ENDCOLOR%
      * TCS to FITS Header Thread Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Filter Control Software to FITS Header Thread Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Shutter Control Software to FITS Header Thread Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Focus Control Software to FITS Header Thread Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Environmental Monitor Software to FITS Header Thread Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      * Temperature Control Software to FITS Header Thread Interface - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
      
---+++++ Software Tools

   * *Waveform Generation* %TWISTY{mode="div" showlink="" hidelink=""
showimgleft="%ICONURLPATH{toggleopen-small}%"
hideimgleft="%ICONURLPATH{toggleclose-small}%"}%
      * Waveform Creator Software - <font style="BACKGROUND-COLOR: red"> Empty Document </font>
         * %RED% Waveform commands %ENDCOLOR%
         * %RED% Waveform output bit assignments %ENDCOLOR
         * %RED% How to define waveforms %ENDCOLOR%
         * %RED% Waveform display software %ENDCOLOR%
         * %RED% How to load waveforms to single board controller %ENDCOLOR%





-- Main.StephenKaye - 02 Jan 2014
Attachments
Topic attachments
I	Attachment	History	Action	Size	Date	Who	Comment
pdf	ADCBufferSchematic.pdf	r1	manage	35.6 K	2014-01-10 - 23:41	UnknownUser	ADC Buffer Schematic
docx	Anti-AliasingFilterDesign.docx	r1	manage	720.6 K	2014-01-10 - 22:48	UnknownUser	Anti-Aliasing Filter Design and Motivation
doc	PreamplifierDesignDocument.doc	r1	manage	1257.0 K	2014-01-09 - 00:24	UnknownUser	Preamplifier Design and Noise Analysis Document
docx	VideoPostProcessorDesignDocument.docx	r1	manage	148.1 K	2014-01-10 - 22:42	UnknownUser	ADC Buffer Design and Noise Analysis
docx	ZTFDesignDocumentTemplate.docx	r1	manage	22.3 K	2014-01-13 - 20:18	UnknownUser	Design Document Template
Topic revision: r13 - 2014-01-15 - StephenKaye
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