---++ NGAO Electronics Architecture Mini Design Review, 26 January 2010 *Review Schedule* * Material to web site: 15-Jan * Response from reviewers due: end of day 22-Jan * Design group's response to reviewer questions: 25-Jan (as soon as possible) * Review meeting: 8:00am-12:00pm (HST) 26-Jan Links to review materials * Charge to Reviewers * [[%ATTACHURL%/CE_Charter.pdf][CE_Charter.pdf]]: Review Committee charter document * Requirements * [[%ATTACHURL%/SRD_FRD_section_electricall.xls][SRD_FRD_section_electricall.xls]]: Initial electronics requirements extracted by CN from Contour * [[][]]: Requirements Compliance Matrix * Design Documents: * [[http://www.oir.caltech.edu/twiki_oir/bin/viewfile/Keck/NGAO/NewKAONs?rev=2;filename=KAON668_NGAO_DeviceArchitecture.doc][KAON 668: Device Architecture]] (v2.0) * [[http://www.oir.caltech.edu/twiki_oir/bin/viewfile/Keck/NGAO/NewKAONs?rev=1;filename=KAON701_NGAOPrelimElexDesign.doc][KAON 701: Preliminary Electronics Design]] (v1.0) * [[http://www.oir.caltech.edu/twiki_oir/bin/viewfile/Keck/NGAO/NewKAONs?rev=1;filename=KAON682_NGAO_Master_Device_List.xls][KAON: 682 Master Device List]] (v1.0) * Review Presentations * Response To Reviewer Comments * Reviewers' final report Reviewer panel: * Thomas Stalcup (chair) * Tomas Krasuski * Rich Dekany -- Main.EdWetherell - 11 Jan 2010
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