• • • Shutter Control Software

• • • Focus Control Software
    • Power Control Software
    • Filter Control Software
    • Environmental Monitoring Software
    • Data Logging Software
    • CCD Control Software
    • Graphical UI (?)

• • Software Module Description Document - Empty Document
    • CCD Control Software
    • Environmental Monitoring Software
    • Power Control Software
    • Filter Control Software
    • Shutter Control Software
    • Focus Control Software
    • Supervisory Control Software
    • Temperature Control Software
    • Data Logging Software
    • Vacuum Monitoring Software

• • Software Inter-Process Communicatons (IPC) Document - Empty Document
    • CCD Server Main to Client Interface
    • CCD Server Main to CCD Controller API Interface
    • CCD Server Main to CCD Readout Thread Interface
    • CCD Server Main to FITS Header Thread Interface
    • CCD Readout Thread to CCD Controller API Interface
    • CCD Controller API to CCD USB Driver Interface

• • Control Hardware Interface Control Document
    • Filter Control Software to Filter Controller Interface
    • Focus Control Software to Focus Controller Interface
    • Power Control Software to Power Controller Interface
    • Shutter Control Software to Shutter Controller Interface
    • Temperature Control Software to Temperature Controller Interface
    • Vacuum Monitoring Software to Vacuum Gauge Interface

• • • TCS to FITS Header Thread Interface
    • Filter Control Software to FITS Header Thread Interface
    • Shutter Control Software to FITS Header Thread Interface
    • Focus Control Software to FITS Header Thread Interface
    • Environmental Monitor Software to FITS Header Thread Interface
    • Temperature Control Software to FITS Header Thread Interface

• • Waveform Creator Software Documentation - Empty Document

• • • Waveform output bit assignments

Firmware

• Communication Firmware Documents
  

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  • Firmware for USB chipset - Empty Document
    • USB Protocol
    • Bit rate control
    • Communication protocol
    • Control/Handshaking protocol and signals
• FPGA Code
  

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  • FPGA Core Firmware Document - Empty Document
    • Compiling FPGA Firmware
    • JTAG interface for FPGA
    • EEPROM
    • Firmware code verification
    • Firmware Updating/Maintenance

• Review Documents %TWISTY{mode="div" showlink="" hidelink=""

• Software Module Descriptions %TWISTY{mode="div" showlink="" hidelink=""

• Software Inter-Process Communications (IPC) Documents %TWISTY{mode="div" showlink="" hidelink=""

• Interfaces to Control Hardware Documents %TWISTY{mode="div" showlink="" hidelink=""

• FITS File Documents %TWISTY{mode="div" showlink="" hidelink=""

Software Tools

• Waveform Generation
  

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  • Waveform Creator Software - Empty Document
    • Waveform commands
    • Waveform output bit assignments %ENDCOLOR
    • How to define waveforms
    • Waveform display software
    • How to load waveforms to single board controller

Host Software

Software

• Review Documents
  

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  • Software Requirements Document - Empty Document
    • Descriptions of system requirements
    • Descriptions of functional requirements
  • Software Architecture Document - Empty Document
    • Description of the overall layout of the software
    • Instrument context diagram
    • List and descriptions of software units
    • List and descriptions of interfaces between units
    • List and descriptions of interfaces between software and hardware
  • Preliminary Design Review Document - Empty Document
  • Detailed Design Review Document - Empty Document
  • Instrument Users Manual - Empty Document
    • Startup procedure description
    • Shutdown procedure description
    • List of operations and how they are used
  • System Command Summary - Empty Document
• Software Module Descriptions
  

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  • CCD Control Software - Empty Document
  • Environmental Monitoring Software - Empty Document
  • Power Control Software - Empty Document
  • Filter Control Software - Empty Document
  • Shutter Control Software - Empty Document
  • Focus Control Software - Empty Document
  • Supervisory Control Software - Empty Document
  • Temperature Control Software - Empty Document
  • Data Logging Software - Empty Document
  • Vacuum Monitoring Software - Empty Document
• Software Inter-Process Communications (IPC) Documents
  

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  • CCD Server Main to Client Interface - Empty Document
  • CCD Server Main to CCD Controller API Interface - Empty Document
  • CCD Server Main to CCD Readout Thread Interface - Empty Document
  • CCD Server Main to FITS Header Thread Interface - Empty Document
  • CCD Readout Thread to CCD Controller API Interface - Empty Document
  • CCD Controller API to CCD USB Driver Interface - Empty Document
• Interfaces to Control Hardware Documents
  

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  • Filter Control Software to Filter Controller Interface - Empty Document
  • Focus Control Software to Focus Controller Interface - Empty Document
  • Power Control Software to Power Controller Interface - Empty Document
  • Shutter Control Software to Shutter Controller Interface - Empty Document
  • Temperature Control Software to Termperature Controller Interface - Empty Document
  • Vacuum Monitoring Software to Vacuum Gauge Interface - Empty Document
• FITS File Documents
  

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  • FITS File Document - Empty Document
    • List of header keywords
    • Sources for keyword values
    • How keywords are collected from sources
    • When keywords are collected from sources
    • When is the header written
    • When and how are the pixel data written
  • TCS to FITS Header Thread Interface - Empty Document
  • Filter Control Software to FITS Header Thread Interface - Empty Document
  • Shutter Control Software to FITS Header Thread Interface - Empty Document
  • Focus Control Software to FITS Header Thread Interface - Empty Document
  • Environmental Monitor Software to FITS Header Thread Interface - Empty Document
  • Temperature Control Software to FITS Header Thread Interface - Empty Document

• • • • Single Board Controller Layout Document - Empty Document
        • Functional block placement (clock functions, bias functions, and signal chain)
        • Ground plane layout and analysis
        • Configuration Control
        • Power consumption
        • Board temperature gradients and thermal analysis

• • • • Preamplifier Schematic - Empty Document

• • • • • Grounding Scheme

• • • • • Grounding Scheme

• • • • FPGA Design Document - Empty Document

• • • • Communication Design Document - Empty Document

• • • • Functional block placement (clock functions, bias functions, and signal chain) - Empty Document
      • Ground plane layout and analysis - Empty Document
      • Configuration Control - Empty Document
      • Power consumption - Empty Document
      • Board temperature gradients and thermal analysis - Empty Document

• • • • All clock channels - Empty Document

• • • • Clock Design and Noise Analysis - Empty Document

• • • • • Clock voltage amplifier design
        • Clock driving current and load analysis
        • Clock switching speed

• • • • • Power supply noise requirements (PSRR Analysis)

• • • • All bias channels - Empty Document

• • • • Bias Design and Noise Analysis - Empty Document

• • • • ADCBufferSchematic - Last updated 1/10/2014

• • • • • Grounding Scheme (mixed-signal ground plane analysis)
        • Power supply noise analysis (PSRR Analysis and ADC bias analysis)
        • Required voltages
        • Power consumption
        • Heat dissipation/thermal analysis
      • ADC Buffer Amplifier Design and Noise Analysis - Last updated 1/10/2014
        • Anti-Aliasing Filter Design - Last updated 1/10/2014

• • • • • Video chain voltage offset noise analysis
        • ADC biasing scheme

• • • Single Board Controller Layout Documents %TWISTY{mode="div" showlink="" hidelink=""

• • • • Functional block placement (clock functions, bias functions, and signal chain)
      • Ground plane layout and analysis
      • Configuration Control
      • Power consumption
      • Board temperature gradients and thermal analysis

• • • Clock Driver Schematic Documents %TWISTY{mode="div" showlink="" hidelink=""

• • • • All clock channels
    • Clock Driver Design Documents %TWISTY{mode="div" showlink="" hidelink=""

• • • • Clock voltage range
      • Clock voltage resolution
      • Clock voltage noise analysis
      • Switching speed analysis
      • Clock driver amplifier design
      • Driving current and load analysis
      • Required voltages
      • Power Supply Noise Requirements (PSRR Analysis)
      • Power consumption
      • Thermal Analysis
      • Heat dissipation/Thermal analysis

• • • Bias Voltage Schematic Documents %TWISTY{mode="div" showlink="" hidelink=""

• • • • All bias channels
    • Bias Voltage Design Documents %TWISTY{mode="div" showlink="" hidelink=""

• • • • Bias voltage range
      • Bias voltage resolution
      • Bias voltage noise analysis
      • Bias voltage amplifier design
      • Bias voltage driving current and load analysis
      • Required voltages
      • Power supply noise requirements (PSRR Analysis)
      • Power consumption
      • Heat dissipation/Thermal analysis

• • • Video Chain Schematic Documents %TWISTY{mode="div" showlink="" hidelink=""

• • • • Preamplifier Schematic
      • ADCBufferSchematic - Last updated 1/10/2014
    • Video Chain Design Documents
      

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      • Preamplifier Design and Noise Analysis Document - Last updated 1/10/2014
      • ADC Buffer Amplifier Design and Noise Analysis - Last updated 1/10/2014
      • %RED Video chain voltage offset noise analysis
      • ADC biasing scheme
      • Anti-Aliasing Filter Design - Last updated 1/10/2014
      • ADC communications/digital interface
      • Grounding Scheme (mixed-signal ground plane analysis)
      • Power supply noise analysis (PSRR Analysis and ADC bias analysis)
      • Required voltages
      • Power consumption
      • Heat dissipation/thermal analysis

• • • FPGA Design Documents %TWISTY{mode="div" showlink="" hidelink=""

• • • • FPGA block diagram
      • FPGA schematic and pinout
      • FPGA core firmware
      • Multi-board FPGA synchronization
      • Programmability/diagnostic outputs
      • USB communication interface
      • Clock driver interface
      • Waveform generator
      • DAC interface
      • ADC interface
      • Data processing
      • Required voltages
      • Power consumption
      • Heat dissipation/thermal analysis
    • Communication Design Documents
      

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      • Communication block diagram
      • Communication schematic
      • USB Communication chipset
      • FPGA/USB interface
      • Communication Traffic Control
      • Fiber optic chipset
      • USB configuration
      • Required voltages
      • Power consumption
      • Heat dissipation/thermal analysis

• • • Power Supply Board vs. Chassis Power Supply Trade Study %TWISTY{mode="div" showlink="" hidelink=""

• • • • Trade off study of power supply board versus power for chassis
      • Voltage/Current Requirements
      • Voltage Noise Requirements
      • Power Dissipation
      • Thermal Analysis/Thermal Management/Active Cooling
      • Connector Pinouts
    • Backplane Documents %TWISTY{mode="div" showlink="" hidelink=""

• • • • Full backplane schematic
      • Connector Pinouts
      • Mounting Hardware
      • Test Points
    • Mechanical Documents %TWISTY{mode="div" showlink="" hidelink=""

• • • • Solidworks drawing of Chassis
      • Mounting points for Chassis
      • Cooling/Temperature Monitoring of Chassis
      • State of Health Monitoring of Chassis

• • • Single Board Controller Layout Document %TWISTY{mode="div" showlink="" hidelink=""

• • • Clock Driver Schematic Document %TWISTY{mode="div" showlink="" hidelink=""

• • • Clock Driver Design Document %TWISTY{mode="div" showlink="" hidelink=""

• • • Bias Voltage Schematic Document %TWISTY{mode="div" showlink="" hidelink=""

• • • Bias Voltage Design Document %TWISTY{mode="div" showlink="" hidelink=""

• • • Video Chain Schematic Document %TWISTY{mode="div" showlink="" hidelink=""

• • • Video Chain Design Document %TWISTY{mode="div" showlink="" hidelink=""

• • • FPGA Design Document %TWISTY{mode="div" showlink="" hidelink=""

• • • Communication Design Document %TWISTY{mode="div" showlink="" hidelink=""

• • • Power Supply Board vs. Chassis Power Supply Trade Study %TWISTY{mode="div" showlink="" hidelink=""

• • • Backplane %TWISTY{mode="div" showlink="" hidelink=""

• • • Mechanical %TWISTY{mode="div" showlink="" hidelink=""

• • • • Solidworks drawing of Chassis
      • Mounting points for Chassis
      • Cooling/Temperature Monitoring of Chassis
      • State of Health Monitoring of Chassis

• PreamplifierDesignDocument.doc: Preamplifier Design and Noise Analysis Document

• • • • %TWISTY{mode="div" showlink="Clock Driver Schematic Document " hidelink="Clock Driver Schematic Document "

• • • • • Clock voltage range
        • Clock voltage resolution
        • Clock voltage noise analysis
        • Switching speed analysis
        • Clock driver amplifier design
        • Driving current and load analysis
        • Required voltages

• • • • • Power consumption

• • • • • Heat dissipation/Thermal analysis

• • • • %TWISTY{mode="div" showlink="Bias Voltage Schematic Document " hidelink="Bias Voltage Schematic Document "

• • • • %TWISTY{mode="div" showlink="Bias Voltage Design Document " hidelink="Bias Voltage Design Document "

• • • • • Bias voltage range
        • Bias voltage resolution
        • Bias voltage noise analysis
        • Bias voltage amplifier design
        • Bias voltage driving current and load analysis
        • Required voltages
        • Power supply noise requirements (PSRR Analysis)
        • Power consumption
        • Heat dissipation/Thermal analysis

• • • • %TWISTY{mode="div" showlink="Video Chain Schematic Document " hidelink="Video Chain Schematic Document "

• • • • • Preamplifier design and noise analysis
        • ADC buffer amplifier design and noise Analysis
        • Video chain voltage offset noise analysis
        • ADC biasing scheme
        • ADC anti-aliasing filter design
        • ADC communications/digital interface

• • • • • Power supply noise analysis (PSRR Analysis and ADC bias analysis)
        • Required voltages
        • Power consumption
        • Heat dissipation/thermal analysis

• • • • • FPGA block diagram
        • FPGA schematic and pinout
        • FPGA core firmware
        • Multi-board FPGA synchronization
        • Programmability/diagnostic outputs
        • USB communication interface
        • Clock driver interface
        • Waveform generator
        • DAC interface
        • ADC interface
        • Data processing
        • Required voltages
        • Power consumption
        • Heat dissipation/thermal analysis

• • • • Communication block diagram
      • Communication schematic
      • USB Communication chipset
      • FPGA/USB interface

• • • • Fiber optic chipset
      • USB configuration
      • Required voltages
      • Power consumption
      • Het dissipation/thermal analysis

• • • • • All clock channels

• • • • • All bias channels

• • • Video Chain
      • %TWISTY{mode="div" showlink="Video Chain Schematics " hidelink="Video Chain Schematics "

• • • • • All video channels
      • %TWISTY{mode="div" showlink="Video Chain Design Document " hidelink="Analog Signal Chain Design Document "

• • • • • Preamplifier Design and Noise Analysis
        • ADC Buffer Amplifier Design and Noise Analysis
        • Video Chain Voltage Offset Noise Analysis

• • • • • ADC Anti-Aliasing Filter Design

• • • • %TWISTY{mode="div" showlink="Video Chain Power Analysis " hidelink="Video Chain Power Analysis "

• • • On-Board Digital Logic

• • • • • FPGA schematic and pinouts
        • FPGA Block Diagram

• • • • • Power Dissipation and Thermal Analysis
        • Data Processing
      • Waveform Generation
        • Timing Generator
        • Waveform Generation Creator Software

• • • %TWISTY{mode="div" showlink="Power Supply Board vs. Chassis Power Supply Trade Study " hidelink="Power Supply Board vs. Chassis Power Supply Trade Study "

• • • • Thermal Analysis/Thermal Management/Active Cooling

• • • %TWISTY{mode="div" showlink="Backplane " hidelink="Backplane "

• • • Mechanical  Machanical 

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• • • Single Board Controller Overview
      • Single Board Controller Layout Document  Single Board Controller Layout Document 

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        • Functional block placement (clock functions, bias functions, and signal chain)
        • Ground plane layout and analysis
        • Configuration Control
        • Power consumption
        • Board temperature gradients and thermal analysis

• • Chassis
    • Power Supply Board vs. Chassis Power Supply Trade Study

• • • • Trade off study of power supply board versus power for chassis
      • Board heat transfer and thermal analysis
      • Water cooling of chassis
      • Chassis Power Analysis
      • Chassis Connector Pinouts
      • Chassis Power

Host Software

• • • • Clock Driver Schematic  Clock Driver Schematic 

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        • All unique channels
      • Clock Driver Design Document  Clock Driver Design Document 

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• • • • Clock Driver Power Analysis  Clock Driver Power Analysis 

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• • • • Bias Voltage Schematics  Bias Voltage Schematics 

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        • All unique channels
      • Bias Voltages Design Document  Bias Voltages Design Document 

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• • • • Bias Voltages Power Analysis  Bias Voltages Power Analysis 

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• • • • Analog Signal Chain Schematics  Analog Signal Chain Schematics 

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        • All unique channels
      • Analog Signal Chain Design Document  Analog Signal Chain Design Document 

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• • • • Analog Signal Chain Power Analysis  Analog Signal Chain Power Analysis 

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• • • • FPGA Schematics  FPGA Schematics 

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        • All unique channels and pinouts
      • FPGA Design Document  FPGA Design Document 

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• • • • FPGA Power Analysis  FPGA Power Analysis 

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• • • • Communication Hardware Schematic  Communication Hardware Schematic 

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        • Full communication block diagram
        • Full communication hardware schematic
      • Communication Design Document  Communication Design Document 

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• • • • Single Board Controller Complete Schematic  Single Board Controller Schematic 

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        • Full schematic with all functional blocks
      • Single Board Controller Power Analysis  Single Board Controller Power Analysis 

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• • • • Single Board Controller Design Document  Single Board Controller Design Document 

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• • • • Single Board Controller Layout Document  Single Board Controller Layout Document 

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• • • Power Board Schematic  Power Board Schematic 

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      • • Full schematic for the power board
    • Power Board Design Document  Power Board Design Document 

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• • • Backplane Schematic  Backplane Schematic 

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      • • Full backplane schematic
    • Backplane Design Document  Backplane Design Document 

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• • Command Line Library  Command Line Library 

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• • Image File Format Document  Image File Format Document 

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• Electrical
  • Single Board Controller
    • Clock Driver
      • Clock Driver Schematic (All unique channels)
      • Clock Driver Design Document
        • Rail Noise Analysis
        • Switching Speed Analysis
        • Driving Current and Load Analysis
        • Rail Voltage Resolution
        • Clock Driver Filter Design
        • Clock Driver Amplifier Design
        • Power Supply Noise Requirements (PSRR Analysis)
      • Clock Driver Power Analysis
        • Power Dissipation
        • Thermal Analysis
        • Heat Sink Design (if necessary)
    • Bias Voltages
      • Bias Voltages Schematic (All unique channels)
      • Bias Voltages Design Document
        • Voltage Noise Analysis
        • Driving Current and Load Analysis
        • Bias Voltage Resolution
        • Bias Filter Design
        • Bias Voltage Amplifier Design
        • Power Supply Noise Requirements (PSRR Analysis)
      • Bias Voltages Power Analysis
        • Power Dissipation
        • Thermal Analysis
        • Heat Sink Design (if necessary)
    • Analog Signal Chain
      • Analog Signal Chain Schematic (All unique channels)
      • Analog Signal Chain Design Document
        • Signal Chain Amplifier Design
        • Signal Chain Noise Analysis
        • Signal Chain Voltage Offset Noise Analysis
        • Signal Chain Filter Design
        • ADC Biasing Scheme
        • ADC Anti-Aliasing Filter
        • ADC Communications/Digital Interface
        • Grounding Scheme (mixed-signal ground plane analysis)
        • Power Supply Noise Analysis (PSRR Analysis and ADC bias analysis)
      • Analog Signal Chain Power Analysis
        • Power Dissipation
        • Thermal Analysis
        • Heat Sink Design (if necessary)
    • FPGA
      • FPGA Schematic and Pinouts
      • FPGA Design Document
        • FPGA Core Firmware
        • FPGA Synchronization
        • FPGA Programmability/Diagnostic Outputs
        • USB Communication Interface
        • ADC Interface
        • Clock Driver Interface
        • DAC Interface
      • FPGA Power Analysis
        • Power Dissipation
        • Thermal Analysis
        • Heat Sink Design (if necessary)
    • Communications
      • Communication Hardware Schematic
      • Communication Design Document
        • USB Communication Chipset
        • Fiber Optic Chipset
        • Communication/FPGA Interface
        • Communication Traffic Control
        • Thermal Analysis
        • Power Dissipation
        • Heat Sink Design (if necessary)
    • Single Board Controller
      • Single Board Controller Complete Schematic
      • Single Board Controller Power Analysis
        • SBC Board Power Dissipation
        • Thermal Analysis/Hotspots
        • Heat Sink Design (if necessary)
      • Single Board Controller Design Document
        • Total numbers of functional blocks (i.e. clocks, biases, signal chains)
        • Ejector Hardware/Front plate
        • Test points
        • Diagnostics/Self-Diagnostics
        • Backplane connector pinouts
      • Single Board Controller Layout Document
        • Functional block placement (clock functions, bias functions, and signal chain)
        • Ground plane layout and analysis
  • Power Supply Board
    • Power Board Schematic
    • Power Board Design Document
      • Voltage/Current Requirements
      • Voltage Noise Requirements
      • Thermal Analysis
      • Power Dissipation
      • Heat Sink/Thermal Management/Active Cooling
      • Connector Pinouts
  • Backplane
    • Backplane Schematic
    • Backplane Design Document
      • Connector Pinouts
      • Mounting Hardware
      • Test Points
  • Chassis
    • Chassis Power Connector
      • Chassis Power Analysis
    • Chassis Connector Pinouts

• Mechanical
  • Chassis Design
    • Solidworks drawing of Chassis
    • Mounting points for Chassis
    • Cooling/Temperature Monitoring of Chassis
    • State of Health Monitoring of Chassis

• Communication
  • Firmware for USB chipset
  • Communication Protocol
• FPGA Code
  • FPGA Core Firmware Document
  • Firmware Updating/Maintenance
• Waveform Generation
  • Waveform Generation Document
  • Waveform Creator Software
  • Waveform Loader Software
• Host Computer Code
  • Command Line Library

User Manuals

• Observer Use
  • GUI Description and Use
  • Image File Format Document
    • Header Data
    • Compression Algorithm
    • Interlacing/De-Interlacing Protocol
  • Quick-Look Image Software

IFPAC System Documentation

Hardware

• Electrical
  • Single Board Controller
    • Single Board Controller Complete Schematic
    • Clock Driver
      • Clock Driver Schematic (Single Channel and/or all unique channels)
      • Clock Driver Design Document
      • Clock Driver Power Analysis
    • Analog Signal Chain
      • Analog Signal Chain Schematic
      • Analog Signal Chain Design Document
      • Analog Signal Chain Power Analysis
    • FPGA
      • FPGA Schematic
      • FPGA Design Document
      • FPGA Power Analysis
  • Power Supply Board
  • Backplane
    • Backplane Schematic
    • Backplane Design Document
    • Backplane Connector Pinouts

• Mechanical
  • Chassis Design
    • Solidworks drawing of Chassis
    • Mounting points of Chassis
    • Cooling/Temperature Monitoring of Chassis

Software

• FPGA Code
  • Clock Driver Schematic Portion
  • Signal Chain Schematic Portion
  • FPGA Schematic Portion
• Power Supply Board Schematic

User Manuals

• Waveform Generation
  • Waveform Creator Software
  • Loading Waveform into FPGA
• Observer Use
  • GUI Description and Use
  • Command Line Library
    • DAC Commands
    • Bias Commands
    • Clock Commands
    • Self-Diagnostics
    • Board Temperature Monitor
    • Exposure Control
    • Shutter Interface
    • Digital Status Bits

-- StephenKaye - 02 Jan 2014